1. Field of the Invention
The present invention relates to a method for manufacturing an electronic circuit device in which a circuit element is connected to a substrate through bumps formed by using a wire bonding method, and to an electronic circuit device.
2. Description of the Related Art
In recent years, for manufacturing high-performance, miniaturized, and low-profile portable telephones, personal computers, etc., a flip chip mounting method using bumps has been increasingly adopted. The bumps are provided either on a substrate or on a chip (circuit element).
According to a known technique, in order to mount the chip on the substrate using the bumps, a part of the wiring pattern of the substrate is registered as a recognition pattern and the relative location between the recognition pattern and the mounting central location is registered to decide the mounting location of the chip. When the chip is mounted on the substrate, in order to realize good electrical conduction, it is desirable to make the centers of the electrodes of the chip agree with the centers of the connection bumps.
However, when a sintered ceramic substrate or a resin substrate is used as the substrate, since the accuracy for forming the wiring pattern is about ±30 μm, this technique of determining the mounting location of the chip with reference to the wiring pattern causes spatial displacement between the chip electrodes and the connection bumps.
Japanese Unexamined Patent Application Publication No. 9-181098 proposes a semiconductor device in which connection bumps are formed on electrodes of a substrate by a wire bonding method, a chip is mounted through these connection bumps, recognition marks are formed outside the chip mounting location of the substrate at two locations on a diagonal line with respect to the chip, and the spatial relation between the substrate and the chip is recognized through the recognition marks to mount the chip.
However, the above recognition marks are formed by coating ink, for example, on the substrate. That is, the recognition marks and the connection bumps are formed by quite different processes. The connection bumps are not always formed at fixed locations of the electrodes of the substrate, and some displacement may occur. Accordingly, the relative location between the recognition marks and the connection bumps varies and, even if the chip is mounted with reference to the recognition marks, spatial displacement between the centers of the electrodes of the chip and the centers of the connection bumps cannot be reduced.
Japanese Unexamined Patent Application Publication No. 2002-9347 proposes a technique in which recognition bumps and connection bumps are simultaneously formed on electrodes of a substrate by a plating method and the recognition bumps are registered as a recognition pattern to decide the location for mounting a chip. In this case, the accuracy for forming bumps is about ±5 μm and, since this is more accurate than the wiring accuracy, there is an advantage in that spatial displacement between the centers of electrodes of the chip and the centers of the connection bumps can be reduced.
To perform image recognition of the recognition bumps, light is applied to the substrate from a light source, the reflected light from the substrate is captured by a camera, and a contrast of the recognition object can be obtained by representing the intensity of the reflected light in binary or multilevel fashion. Here, the light applied to the substrate is vertical light applied by epi-illumination or ring illumination, having the same axis as the camera.
But the plated bumps have a substantially flat upper surface. When plated bumps are used as recognition bumps, the reflected light from the upper surface has the same intensity as the reflected light from the recognition bump electrodes. Therefore, even if the reflected light picked up by the camera is represented in binary form, no contrast can be obtained between the recognition bumps and the recognition bump electrodes, which causes a problem in that the location of the recognition bumps cannot be accurately detected.